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Efinix® Releases Efinity® RISC-V Embedded Software IDE
  • 해당된 기사를 공유합니다

산업 경제 뉴스

Efinix® Releases Efinity® RISC-V Embedded Software IDE

New software IDE is powered by Ashling’s RiscFree™ IDE for intuitive development and debug on the Efinix Sapphire RISC-V core

제주문화캠프 참가자들이 기념 촬영을 하고 있다

 

천안시태조산청소년수련관(관장 윤여숭)은 광풍청소년방과후아카데미가 11월 3일(목)부터 5일(토)까지 2박 3일간 ‘제주문화캠프’를 진행했다고 밝혔다.

이번 활동의 일정은 △제주민족자연사박물관 △메이즈랜드 △올레길 7코스 투어 △성산일출봉 △4.3평화공원 등 청소년들의 문화적 견문 및 제주의 문화체험의 기회를 제공하기 위해 기획됐다.

광풍중학교 황영은 교장은 “청소년들에게 다른 지역의 문화 체험의 기회로 몸과 마음을 회복하고, 교우 관계 개선과 참여 청소년의 결속력을 다져 건강한 청소년으로 성장하는 밑거름이 되는 기회였다”고 말했다.

천안시태조산청소년수련관 윤여숭 관장은 “청소년 문화 불균형 해소와 미래를 꿈꾸며 만들어가는 청소년들에게 다양한 프로그램을 제공하기 위해 더욱 노력하겠다”고 밝혔다.

청소년방과후아카데미는 방과후 돌봄이 필요한 청소년들에게 체험활동, 학습지원, 생활지도, 상담, 차량 및 급식지원 등 종합서비스를 제공하는 국가 정책지원사업이다.

해당 보도자료는 충청남도청소년진흥원의 지원을 받아 배포됐다.

언론연락처: 천안시태조산청소년수련관 광풍청소년방과후아카데미 김혜진 070-5165-5754

이 뉴스는 기업·기관·단체가 뉴스와이어를 통해 배포한 보도자료입니다.Efinix®, an innovator in programmable product platforms and technology, today announced the release of its Efinity® RISC-V Embedded Software IDE. Powered by the popular Ashling RiscFree™ IDE, the embedded environment simplifies the creation, management, and debug of projects running on the Efinix Sapphire RISC-V core. Through tight integration with the Efinity design environment, the new IDE provides an intuitive way for designers to import projects created for the revolutionary Trion® and Titanium FPGAs and rapidly develop embedded RISC-V code in a rich debug environment.

“The Efinity RISC-V Embedded Software IDE delivers a truly intuitive design workflow for our best-in-class Sapphire RISC-V core,” said Jay Schleicher, Efinix SVP of Software Engineering. “Our collaboration with Ashling pairs the market leading development and debug environment with our efficient and disruptive FPGA technology to speed time to success in a wide range of embedded compute applications.”

The Efinity RISC-V Embedded Software IDE is a turn-key package that delivers enhanced debug in both bare metal and FreeRTOS environments. Integration with Efinity projects delivers design flow automation for register level debug of both CSR and peripheral registers within the FPGA SoC while FreeRTOS task and queue lists provide application-level visibility. The QEMU emulation support, included in the IDE, offers workflow flexibility enabling SoC debug in the absence of target hardware.

“RiscFree is synonymous with RISC-V and one of the market leaders in the RISC-V debug space,” said Hugh O’Keeffe, Ashling CEO. “Combining RiscFree with the clear advantages of the Efinix Sapphire RISC-V core and Quantum Fabric delivers an efficient workflow with enhanced design and debug visibility for fast time to market with highly optimized, embedded compute designs.”

About Efinix

Efinix®, an innovator in programmable products, is committed to delivering the low power and reconfigurability of its high-performance Titanium FPGA silicon platforms for applications in the mainstream market. Efinix FPGAs deliver power, performance, and area advantages over traditional FPGA technologies, unlocking new applications and delivering rapid time to market. Titanium devices range from 35K to 1M logic elements, have a small form-factor, low-power, and are priced for high-volume production. The Efinity® Integrated Development Environment provides a complete FPGA design suite from RTL to bitstream.

For more information, visit http://www.efinixinc.com.

언론연락처: Efinix Mark Oliver VP of Marketing Ashling Hugh O’Keeffe CEO

이 뉴스는 기업·기관·단체가 뉴스와이어를 통해 배포한 보도자료입니다.




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